This disclosure relates to a printed circuit board (PCB) and a semiconductor packaging including the PCB which is used in a semiconductor package manufacturing process, and more particularly, to a PCB and a semiconductor package including the PCB which is used in a ball grid array (BGA) semiconductor package having a chip-scale package (CSP) that is 1.2 times larger than a semiconductor chip.
Semiconductor packages have been developed to both protect an internal semiconductor chip and to expose electrical functions of the semiconductor chip. However, electronic products such as mobile phones, computers, and various kinds of medical electronic equipments, which employ a semiconductor package, have become thin and more compact. Accordingly, improved semiconductor packages, such as a BGA semiconductor package, a CSP, a multi-chip package (MCP), a system in package (SIP), and the like, have been introduced. An external shape of such semiconductor packages has become thin and more compact. In addition a size of a semiconductor chip in the semiconductor package has decreased since the semiconductor chip is highly integrated in a wafer manufacturing process, and the number of input/output (I/O) terminals included in the semiconductor chip substantially has increased. As a result, the semiconductor package has many unresolved issues since the number of pins in an external connecting terminal rapidly increased.
A manufacturing process of the BGA semiconductor package forms a plurality of semiconductor packages on a matrix type PCB in which a plurality of semiconductor package unit frames are matrix-arrayed, and divides the semiconductor packages into a unit BGA semiconductor package by using a saw blade. At this time, the semiconductor package unit frames for the manufacture of a semiconductor package in the matrix type PCB are divided from each other along a scribe lane. Here, the scribe lane is a lane where the saw blade passes, and thus, it is also called a saw line. Also, each of the semiconductor package unit frames internally includes a bond finger, a via land, a solder ball pad, and a printed circuit pattern. The bond finger represents a passage electrically connected to a semiconductor chip via a wire or a bump, the via land represents a through electrode that connects printed circuit patterns which are disposed on top and bottom surfaces in each of the semiconductor package unit frames, and the solder ball pad represents an area in which solder balls are attached in each of the semiconductor package unit frames.